References Optical Slot Synchronisation Scheme 2. H a a S Lndexing Terms. Synchronisation, Optical Communication, Packet Switching

Watt three-stage Q-band MESFET monolithic power amplifier'. Fig. 1 Packerpipping scheme for packet synchronisation Within this frame, however, the packet may Hoat. If such traffic is presented to an all-optical packet switch with slot size equal to the frame size (i.e. with twice as long slot size), the switch preserves the 'one packet per frame' rule. However, if this traffic coming from the output of the switch is received at the next switching node with unsynchronised local frame clock, the 'one packet per frame' rule may be violated, as shown in Fig. 1. To correct this, so that again there is a single packet per frame aligned with the new local frame clock, the hardware in Fig. 2 is introduced. Each module can either add no extra delay or a delay of 7 to the optical signal. If a packet does not fall in between two clock frames or if there are two A scheme is presented that allows the synchronisation of packets at the input to an optical, synchronously-operated packet switch. The scheme requires only two delay modules and carries a penalty of 50% of the switch capacity Introduction and motivation: In wide-area networks, because of the relatively large uncertainty and considerable changes in the optical signal propagation delay, there is the need to continuously synchronise the packet arrival times at the inputs with the local slots of a synchronously-operated optical packet swtich. An example of such a switch is described in Reference 1. Previously proposed schemes rely on a multiplic-ity of delay devices, each with a fractional part of the packet transmission time, so that nearly any value of delay may be generated and used to compensate for the difference between the packet arrival time and the beginning of a local slot. Such devices are commonly built out of switching modules (such as